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Syntor X9000 VCO reference divider questions

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mancow
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Syntor X9000 VCO reference divider questions

Postby mancow » Mon Dec 24, 2012 11:20 pm

I'm looking at the D0-D3 and A0-A2 logic lines that load and latch the data into the VCO reference divider but I'm not quite understanding how they are deriving a frequency from this. The manual says they are using six four bit words but I've tried different conversions and I'm not seeing it.

I want to drive U603 directly with my own data if I can figure out the conversion.

I'm using a logic analyzer and this is what I'm seeing for 29.6 and 29.620

29.6
D0 0 1 0 1 1 0 0 0
D1 1 0 0 1 0 1 1 0
D2 0 1 1 0 1 1 1 0
D3 1 0 1 0 1 1 1 0

A0 0 1 1 0 1 0 0 0
A1 0 0 1 0 1 1 1 1
A2 0 0 0 1 1 1 1 0


29.62
D0 1 1 0 0 1 0 0 0
D1 1 0 1 0 1 1 1 0
D2 1 1 1 1 1 1 1 0
D3 0 0 1 0 1 1 1 0

A0 0 1 1 0 1 0 0 0
A1 0 0 1 0 1 1 1 1
A2 0 0 0 1 1 1 1 0

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Re: Syntor X9000 VCO reference divider questions

Postby N9LLO » Tue Dec 25, 2012 4:41 am

You might have a look here I think there is some info that might carry over to the X9000?

http://home.xnet.com/~pakman/syntor/syntorx.htm

Chris
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Re: Syntor X9000 VCO reference divider questions

Postby Mike B » Tue Dec 25, 2012 8:33 am

The link above is the correct link. The synthesizers are the same in the Syntor X and Syntor X9000 radios, except for some minor changes in the analog PLL ramp circuit.

Your logic analyzer trace shows two Rx frequencies (S0 is always 1) with the Rx Extender (low band very fancy noise blanker) turned on. Because S0/S1 do not change values, these are only a refresh of the same frequency as last time. S0/S1 are strictly used to control U603 for actual frequency changes, otherwise they stay the same when the frequency does not change. The ADAPT U602 pin 11 signal will tell you when the synthesizer is locked. In the X9k the ADAPT only goes to the squelch hybrid and Q505 to disable the PA deck when the synthesizer is not locked. The X9k U500 processor is not aware of the actual synthesizer unlock/lock state.

Code: Select all

U503   |   A3   | A2 | A1 | A0 | D3 | D2 | D1 | D0
U602   | strobe | A2 | A1 | A0 | D3 | D2 | D1 | D0
-------+--------+----+----+----+----+----+----+----
addr 0 | + edge |  0 |  0 |  0 | A3 | A2 | A1 | A0*
addr 1 | + edge |  0 |  0 |  1 | B1 | B0*| A5 | A4
addr 2 | + edge |  0 |  1 |  0 |  0 |  0 |  0 |  0
addr 3 | + edge |  0 |  1 |  1 | B5 | B4 | B3 | B2
addr 4 | + edge |  1 |  0 |  0 | B9 | B8 | B7 | B6
addr 5 | + edge |  1 |  0 |  1 |  - |  - |  - |  -
addr 6 | + edge |  1 |  1 |  0 | S1 | S0 | C1 | C0
addr 7 | + edge |  1 |  1 |  1 | V1 | V0 | R1 | R0


R0 = Reference Select - 0 = 6.25 KHz, 1 = 5 KHz
R1 = Reference Select - always 1
S0 = Low Band Width PLL Control, Tx Only - 0 = active
S1 = Frequency Change PLL Control - 0 = frequency change, 1 = no change
C0 = 3/4 Prescaler or Low Band “Rx Extender” On = 0, “Rx Extender” Off = 1
C1 = 3/4 Prescaler or Low Band Always = 1
V0 = VCO Tuning Range Select MSB (not used on 800 MHz radio)
V1 = VCO Tuning Range Select LSB (used on talkaround 800 MHz radio)
Synthesizer 6 bit Word A0, A1, A2, A3, A4, A5
Synthesizer 10 bit Word B0, B1, B2, B3, B4, B5, B6, B7, B8, B9
*A0 and B0 bits are inverted values.
Strobe is a positive edge U602 data input latch control.

S0 controls the U603 PLL RSW (receive) and TSW (transmit) filter selection.
S1 starts the U603 PLL ADAPT and -ADAPT process.

The Low Band Width PLL Control tightens up the PLL accuracy for Tx. Rx is allowed to be a little looser. Presumably for faster synthesizer PLL locks.

Sequence is address 0, 1, 3, 4, 7, 6, 6 (6 is twice to toggle S1/S0 bit values in U602) and finally address 2 (address 2 is the between frequency changes idle state). The two 6s are for the S1/S0 frequency change bit control toggle and are always used even if the frequency is the same as last time and there is no frequency change (S1/S0 do not change values unless the frequency is changed). Each address in the U503 sequence is sent twice by U500 to only toggle the A3 strobe bit (nothing else is changed during a strobe toggle). This strobe toggle enters the U503 output data into the U602 data input. The sequence of strobes are supposed to occur every 20 milliseconds (each individual frequency has multiple strobes and individual frequencies are refreshed every 20 ms, even if the frequency does not change) to keep the 30 millisecond radio Watch Dog Timer from triggering a reset. If you do away with the personality board the Watch Dog Timer goes away.

I measured a positive going Strobe pulse is about 3.24 µs to 3.28 µs wide on about a 10 µs period for each frequency change. This timing might be critical to the U602/U603 PLL lock timing? At least we know this works, any different timing would need testing.

Merry Christmas!
Last edited by Mike B on Tue Dec 25, 2012 8:54 am, edited 1 time in total.

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Tue Dec 25, 2012 8:51 am

:o

And I hoped it would be simple


Thanks for all of that. That's the first time I have seen it broken down. It also explains why I'm seeing the data repeat every 80 ms on the logic analyzer.

Man it sure seems like they overengineered that whole process into a convaluted up down back and forth mess.

I was hoping to duplicate the process in an Arduino to control tuning but now im not so sure.

Any idea how the 6 and 10 bit words relate to freq?

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Tue Dec 25, 2012 9:09 am

Here's what I'm seeing when parked on 42.860 MHz

Image

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Re: Syntor X9000 VCO reference divider questions

Postby Mike B » Tue Dec 25, 2012 10:08 am

Oops, I forgot the signal timing information the first time and added it (see the edit notice at the bottom).

The timing looks good. It follows the 0, 1, 3, 4, 7, 6, 6 and 2 address sequence. You might expand the logic analyzer timing base (stretch out the pulse lengths in the timing diagram) and check the strobe edge synchronization (I had + edge strobe in my notes, but I might have been wrong or written it down wrong - it was a long time ago). Come to think of it, I think maybe I only meant positive going pulse and never nailed down which edge of the pulse it might have been. I used a logic analyzer with a 1 GHz time base sample rate to capture fairly accurate timing data.

The packman web page link shows the frequency calculations in detail. It shows how to calculate the synthesizer bit values to get a desired frequency, and it shows how to calculate the frequency from the synthesizer bit values The 6 and 10 bit words relate to the actual physical divider chains inside the U602 chip silicon. I remember a long time ago someone published a simple loop algorithm that would solve the synthesizer bit values for a given frequency without the math. I think it was written in ancient Basic language with line numbers and all that.

I did an 8 bit microprocessor application that had an assembly language table driven/assisted divide by 63 algorithm to keep the frequency calculation really fast and not bog down the processor chip. An Arduino would be up to this with no problem. You could even use the Arduino math library divide function as long as it does not slow down your processor chip too much. My application had a busy processor chip that did not like being bogged down with divides that were not even binary divisors, in constantly repeated calculations like changing scan frequencies constantly. If the Arduino does not have lots of other demanding tasks and depending on how efficient the Arduino math library is, it may not even be any problem to divide by 63 in Arduino source code for each frequency calculation. You could look for the old loop iteration solution and avoid the divide by 63. It must still be out there somewhere. There is a new ARM core Arduino on the way that should be able to eat divide by 63 calculations for breakfast and still have the entire rest of the day to look for something else to do :).

This radio constantly refreshes the synthesizer values or the entire radio system resets through the J1 pin 4 RESET pin, thanks to the Watch Dog Timer hybrid on the personality board. It also refreshes the audio amplifier volume synchronous serial control data constantly. Maybe they thought if any internal data transfer got corrupted by Tx noise, another correct value would not be far behind timing wise and the overall radio operation would remain reliable (if you get a random bad synthesizer code, the VCO cannot change quickly enough to do any damage with another correct code quickly on the way)? Anyway it works and it is reliable! The somewhat complex U602 address sequence is the fault of the U602/U603 chip designers :). It has very nice features for its day. The low bandwidth control allows the VCO PLL to change frequencies rapidly (i.e. allow large rapid changes in the PLL ramp voltages when it is off, and then only allow the PLL ramp voltage to make small changes slowly when it is on). Compared to older synthesizer designs this synthesizer is capable of making much faster frequency changes, while still maintaining tight control of the Tx frequency. This really shows itself in the Rx scan rate performance, especially the priority scan modes.

Of course new/modern direct digital synthesizer (DDS) designs change frequencies incredibly fast, but the analog design is very difficult when you require spectral purity from the synthesizer output.

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Re: Syntor X9000 VCO reference divider questions

Postby Mike B » Tue Dec 25, 2012 2:33 pm

I found the other method to calculate the A & B bit values for a desired frequency documented here:
http://www.paul-bennett.com/Motorola/algorith.htm

In theory it appears that worst case you can get 64,449 attempts to find the correct frequency. If your AVR processor in your Arduino has the hardware multiplier, the A*63 will be fast. Still true divide by 63 software should be faster overall.

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Tue Dec 25, 2012 3:39 pm

Awesome man thanks! I will try to convert this over to the proper code.

As for the timing sequence (it reminds me of a V8 firing order or something) it makes sense now. Without that information it was almost as if it were encrypted or at least scrambled.

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Re: Syntor X9000 VCO reference divider questions

Postby Mike B » Thu Dec 27, 2012 8:18 am

Another piece of the puzzle is you also need to put your logic analyzer on P601 pin 9 Synthesizer Sync. This is a U603 pin 4 output that goes to the U500 pin 17 input. It is part of the synthesizer frequency change mechanism timing.

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Thu Dec 27, 2012 8:22 am

OK will do that. Thanks.

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Re: Syntor X9000 VCO reference divider questions

Postby mike m » Thu Dec 27, 2012 9:21 pm

Casey, i sent u apm im typing on a friggin nook bookreaader which sucks but check ur pm. I w ont have acess to a real pc for another week. Stuck in the boonies near flagstaff and friggin nook ca nt design a touchscreen thats worth :o."

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Sun Apr 20, 2014 6:33 pm

Can I revive this topic instead of starting a new one please?

mike m and Mike B are you guys still around to answer some questions about it?

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Wed Apr 23, 2014 5:58 pm

I have the code worked out to create the 4 bit address frequency data. I'm working on the other simpler variable state bits now. The Arduino doesn't have a full 8 bit bus anywhere so I might have to use a 75HC756 shift register. As it is so far the data I'm seeing out of the board seems to track with the frequencies in the radio. I hope soon to be able to see if it will actually tune the radio once I get the parallel shift out and timing right.

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Fri May 09, 2014 9:05 pm

It works!

I can tune the radio anywhere the hardware will take it. I just type it in the PC, hit enter, and it goes there. I'm working now on some code to try to detect the PL so I can leave the factory microP isolated only to take care of ancillary duties such as the filter control while tuning and so forth. The PL code is working but I'm not yet sure if it's fast and accurate enough for real time use. The plan is to use one of my custom heads to feed the freq data with indicators for tone, tone squelch, tone encode etc... to the radio for memory tuning. Free VCO tuning is now easy too. I can just spin the dial and get anywhere I want.

It's ugly right now but works very well and is lightning fast.

Image

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Re: Syntor X9000 VCO reference divider questions

Postby PETNRDX » Sat May 10, 2014 9:31 pm

That is just cool as heck.
Lot of work.
Steve K.

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Tue May 27, 2014 7:20 pm

All the receive functions work fine but I'm not able to transmit. Are any of the Mikes available to help? I'm sure one of you guys probably know what's up.

I'm reading the service manual now but I'm not understanding if I need to offset the VCO frequency in transmit mode or what.

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Re: Syntor X9000 VCO reference divider questions

Postby SlimBob » Tue Dec 09, 2014 2:29 pm

Did I say "sweet" yet? Sweet.
Slippery Sal's Saber Shanty! Sorted Simply, stuck in sacks! Standard, SECURENET, and Submersible! Sold in sets of six and seven!

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Re: Syntor X9000 VCO reference divider questions

Postby mancow » Wed Dec 10, 2014 9:01 pm

I got the transmit to work. It was just a matter of not feeding it enough amperage. My power supply was too weak.

I set the project aside though for a while. I thought detecting PL was going to bee too much trouble but in the time since I've put it away the "talk off" issue of detected tones varying a bit with voice is normal I've learned. So, I should have just wrote in a bit of delay to compensate for it. Once I get motivated again I will drag it all out and set it back up. I got to the point where I basically had a full VFO remote control system that fed tuning data from the head to the radio body on the fly. I just need to figure out some menu and memory structure. I really would like to finish this and get it up and running an usable state.

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Re: Syntor X9000 VCO reference divider questions

Postby Jim202 » Thu Dec 11, 2014 6:53 am

mancow wrote:I got the transmit to work. It was just a matter of not feeding it enough amperage. My power supply was too weak.

I set the project aside though for a while. I thought detecting PL was going to bee too much trouble but in the time since I've put it away the "talk off" issue of detected tones varying a bit with voice is normal I've learned. So, I should have just wrote in a bit of delay to compensate for it. Once I get motivated again I will drag it all out and set it back up. I got to the point where I basically had a full VFO remote control system that fed tuning data from the head to the radio body on the fly. I just need to figure out some menu and memory structure. I really would like to finish this and get it up and running an usable state.



Several things come to mind about detecting the CTCSS tone from the receiver. The first statement I would make is that if the filtering doesn't take out the normal voice range, you will have trouble detecting the tones. My second concern is if the originating transmitter your listening to does not have the tone level set correctly. Many of the offshore radios seem to have the tones set way too high. In other case where someone has got their hands into the radio, they have managed to set the tones way too low. This will cause the voice to kill the detection of the CTCSS tone used.

Keep up the good work. Not only are you bringing back to a very versatile radio, you learning a whole lot about the radio and how it works. This is an important move as the manuals for that radio leave much to be desirted for technical information.

Jim


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